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# DOS Diagnostics: Broadcom NetXtreme™ 57XX User Guide

Introduction

Prerequisites

Functions List

Functions Descriptions

Diagnostic Tests

Error Messages

## Introduction

Before you can use the DOS diagnostics utility, you must copy the diagnostics software files to a folder on the root of the C drive. Obtain these files from the support website. The files include B57udiag.exe, Asfeinit.bin, Asfecpua.bin, Asfecpub.bin, Asfe5ini.bin, Asfe5cpa.bin, and Asfe5cpb.bin. The Asfe*.bin files are device-specific.

All commands can be typed from the DOS command prompt or the Broadcom Command Line Interface (CLI) prompt. When using the DOS command prompt, you must type b57udiag -function name (and any options) each time you want to run a command. At the end of the operation, the program returns to the DOS command prompt. In the Broadcom CLI mode, it is not necessary to include b57udiag in the command string; type only the function name and any desired options. At the end of the operation, the program returns to the Broadcom CLI prompt.

In the Broadcom CLI mode, assuming there are 2 devices in the system, all device information is displayed before each CLI prompt, as shown in the following example:

    C Brd:Rv  Bus  PCI Spd Base Irq  EEP  MAC           Fmw         Configuration
    - ------  ---- --- --- ---  ---- --   ------------- ----------- --------------
    0 5705:A3 02:0A:0 32 33 FEAF 3   128K 0010180416DB  5705-v3.16  PW,auto
    1 5705:A3 02:0B:0 32 33 FEAD 11  128K 0010180416C4  5705-v3.16  PW,auto

## Prerequisites

Operating System: DOS 6.22

Software: b57udiag.exe

## Functions List

To access the Functions list, type b57udiag -cmd and press ENTER.

Command | Function
--- | ---
    upgfrm
| Upgrade PXE or Boot Code from a file
    dir
| Display the file directory in NVRAM
    setwol
| Enable/Disable WOL
    setpxe
| Enable/Disable PXE
    setasf
| Enable/Disable ASF
    setmba
| Enable Multiple Boot Agents
    nictest
| Run a set of NIC tests
    exit
| Exit the program
    device
| Show or switch device
    version
| Display program version
    help
| Display the available commands
    dos
| Execute a DOS command
    reset
| Reset chip
    cls
| Clear screen
    asfprg
| Program ASF firmware into NVRAM

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## Functions Descriptions

### upgfrm

Description: Upgrades PXE or Boot Code from a file.

Syntax: upgfrm -options

This command reads code from a file and programs it into the PXE or boot area. Both parameters (the programming target (pxe or boot) and the file name) must be specified.

Options |
--- | ---
    f <string>
| Input file
    p
| Upgrade PXE code
    b
| Upgrade Boot code
    d
| Do not perform device check

### dir

Description: Displays the file directory in NVRAM.

Example:

>     Entry Type SRAM    Addr EEP  Offset     Length   Execute Version
>     ----- ------------ --------- ---------- -------- ------- -------

>            BootCode    08003000  00000200   000011B0 CPUA (2) 5705-v3.16
>       0    PXE         00010000  000013B0   0000C854 no       7.0.1

### setwol

Description: Enables/Disables WOL.

Syntax: setwol -options

Options |
--- | ---
    e
| Enable WOL
    d
| Disable WOL

### setpxe

Description: Enables/Disables PXE and sets PXE speed.

Syntax: setpxe -options

Options |
--- | ---
    e
| Enable PXE
    d
| Disable PXE
    s <DEC>
| Specify PXE speed (default = 0)
| Speed: 0 = Auto 1 = 10 Mbit/s Half-Duplex 2 = 10 Mbit/s Full-Duplex 3 = 100 Mbit/s Half-Duplex 4 = 100 Mbit/s Full-Duplex

### setasf

Description: Enables/Disables ASF.

Syntax: setasf -options

Options |
--- | ---
    e
| Enable ASF
    d
| Disable ASF

### setmba

Description: Enables/Disables Multiple Boot Agent.

Syntax: setmba -options

### nictest

Description: Runs a set of network interface card (NIC) tests.

Syntax: nictest test list

Example: See Diagnostic Tests for details on the test description.

    abcd
| Runs all tests
    b
| Runs all tests in group b
    a3b1
| Runs test a3 and b1 only
    a124b2
| Runs tests a1, a2, a4, and b2

If no test list is typed, the diagcfg setting is used.

Options |
--- | ---
    n <DEC>
| Iteration
    e
| Run NVRAM verification also

### exit

Description: Exits from CLI mode.

Syntax: exit

Example:

>     b57udiag exit

### device

Description: Shows or switches device.

Syntax: device -options

Options |
--- | ---
    n <HEX>
| Device number (default = 00000000)
    r
| Remove all current devices and rescan available devices.
    s
| Silent mode (do not display devices)

### version

Description: Displays software version.

Syntax: version

Example:

>     C:\>b57udiag -version

>     Copyright (c) 2000, 2001, 2002, 2003 Broadcom Corporation, all rights reserved

>     Broadcom Gigabit Ethernet Controller User Diagnostic 7.0 (09/14/03)

### help

Description: Displays the help commands available.

Syntax: help

Example:

>     C:\>b57udiag -help

>     Copyright (c) 2000, 2001, 2002, 2003 Broadcom Corporation, all rights reserved

>     Broadcom Gigabit Ethernet Controller User Diagnostic 7.0 (09/14/03)

Command | Functions
--- | ---
    upgfrm
| Upgrade PXE or Boot Code from a file
    dir
| Display the file directory in NVRAM
    setwol
| Enable/Disable WOL
    setpxe
| Enable/Disable PXE
    setasf
| Enable/Disable ASF
    setmba
| Enable Multiple Boot Agents
    nictest
| Run a set of NIC tests
    exit
| Exit the program
    device
| Show or switch device
    version
| Display program version
    help
| Display the commands available
    dos
| Execute a DOS command
    reset
| Reset chip
    cls
| Clear screen
    asfprg
| Program ASF firmware into NVRAM

### dos

Description: Executes DOS command.

Syntax: dos

If no parameter is typed, the DOS shell is entered.

### reset

Description: Resets chip.

Syntax: reset -options

Options |
--- | ---
    c
| Simulate cold reset
    w
| Wait for firmware signature
    t
| Display time from reset to firmware invert signature

### cls

Description: Clear screen.

Syntax: cls

### asfprg

Description: Programs asf firmware into NVRAM

Syntax: asfprg

The default file names for BCM5702/5703/5704 devices are Asfeinit.bin, Asfecpua.bin, and Asfecpub.bin. The default file names for the BCM5705 device are Asfe5ini.bin, Asfe5cpa.bin, and Asfe5cpb.bin. These files must be in the same directory as the B57diag. exe file. These files can can be overwritten by parameters.

Options |
--- | ---
    v <HEX>
| Verbose level (0,1,2) (def=00000001)

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## Diagnostic Tests

The diagnostic tests are divided into 4 groups: Register Tests, Memory Tests, Miscellaneous Tests, and Data Tests. They are designated Group A, Group B, Group C, and Group D, respectively.

### Test Names

#### Group A

A1. Indirect Register Test
A2. Control Register Test
A3. Interrupt Test
A4. BIST
A5. PCI Cfg Register Test

#### Group B

B1. Scratch Pad Test
B2. BD SRAM Test
B3. DMA SRAM Test
B4. MBUF SRAM Test
B5. MBUF SRAM via DMA Test
B6. External SRAM Test

#### Group C

C1. EEPROM Test
C2. CPU Test
C3. DMA Test
C4. MII Test
C5. VPD Test
C6. ASF Test
C7. ROM Expansion Test

#### Group D

D1. MAC Loopback Test
D2. PHY Loopback Test
D3. RJ-45 Loopback Test
D4. MII Miscellaneous Test
D5. MSI Test

### Test Descriptions

#### A1. Indirect Register Test

Command: regtest -i

Function: This test uses an indirect addressing method to write an increment of data to the MAC hash register table and read back data for verification. The memory read/write is done 100 times while incrementing test data.

Default: Enabled

#### A2. Control Register Test

Command: regtest

Function: Each register specified in the configuration content defines the read-only bit and the read/write bits. The test writes 0s and 1s to the test bits to ensure the read-only bits are not changed, and that read/write bits are changed accordingly.

Default: Enabled.

Default Register table

This test attempts to read the register configuration file (Ctrlreg.txt) for the register definitions. If the file does not exist, a default register offset and mask bits are used.

Offset | R/O Mask | R/W Mask
--- | --- | ---
    0x00000400
    0x00000000
    0x007FFF8C
    0x00000404
    0x03800107
    0x00000000

#### A3. Interrupt Test

Command: intrtest

Function: This test verifies the interrupt functionality. It enables an interrupt and waits 500 ms for the interrupt to occur and reports an error if it cannot generate the interrupt.

Default: Enabled

#### A4. BIST

Command: bist

Function: Hardware built-in self-test (BIST). This test initiates a BIST and waits for the test result returned by the hardware.

Default: Because of the potential for intermittent failure, this test is currently disabled by default.

#### A5. PCI Cfg Register Test

Command: pcicfg

Function: This test verifies the access integrity of the PCI configuration registers.

#### B1. Scratch Pad Test

Command: memtest -s

Function: This test tests the scratch pad SRAM onboard. The following tests are performed:

> Data Pattern Test: This test writes test data to the SRAM and reads it back to ensure that the data is correct. The test data used is 0x00000000, 0xFFFFFFFF, 0xAA55AA55, and 0x55AA55AA.

> Alterate Data Pattern Test: This test writes test data into the SRAM, writes complement test data to the next address, and reads back both to ensure the data is correct. After the test, the program reads back data one more time to ensure that the data is still correct. The test data used is 0x00000000, 0xFFFFFFFF, 0xAA55AA55, and 0x55AA55AA.

> Address Test: This test writes each address with a unique increment of data and reads back data to ensure data is correct. After filling the entire address with the unique data, the program reads back the data again to ensure that the data is still correct.

> WalkingOne Bit Test. For each address, data one is written and read back for testing. Then it shifts the data left one bit, so the data becomes two and repeats the same test. It repeats the test 32 times until the test bit is shifted out of the test address. The same test is repeated for entire test range.

> Pseudo-Random Data Test. A precalculated pseudo-random data set is used to write unique data to each test RAM. After passing the test, the program reads back the data one more time to ensure that the data is still correct.

Default. Enabled

#### B2. BD SRAM Test

Command. memtest -b

Function. This test tests the Buffer Descriptor (BD) SRAM. This test performs in the same way as the Scratch Pad Test described in B1.

Default: Enabled

#### B3. DMA SRAM Test

Command: memtest -d

Function. This test tests the direct memory access (DMA) SRAM by performing the Scratch Pad Test described in test B1.

Default: Enabled

#### B4. MBUF SRAM Test

Command: memtest -m

Function. This test tests the memory access buffer (MBUF) SRAM by performing the Scratch Pad Test described in test B1.

Default: Enabled

#### B5. MBUF SRAM via DMA Test

Command: memtest -x

Function: This test uses 8 data test patterns. A 0x1000-sized data buffer is used for this test. Before each pattern test, the buffer is initialized and filled with the test pattern. It then performs a 0x1000-sized transmit DMA from the host buffer to the controller MBUF memory. The test verifies the data integrity in the controller MBUF memory against the host memory and repeats the DMA for the entire MBUF buffer. Then, the test performs a receive DMA from the controller to the host. The 0x1000-byte test buffer is cleared to 0 before each receive DMA. After the test verifes the integrity of the data, the test is repeated for the entire MBUF SRAM range. The 8 test patterns are described below.

Test Pattern | Description
--- | ---
16 00s and 16 FFs | Fills the entire host DMA buffer with 16 bytes of 00s and then 16 bytes of FFs.
16 FFs and 16 00s | Fills the entire host DMA buffer with 16 bytes of FFs and then 16 bytes of 00s.
32 00s and 32 FFs | Fills the entire host DMA buffer with 32 bytes of 00s and then 32 bytes of FFs.
32 FFs and 32 00s | Fills the entire host DMA buffer with 32 bytes of FFs and then 32 bytes of 00s.
00000000 | Fills the entire host DMA buffer with all 00s.
FFFFFFFF | Fills the entire host DMA buffer with all FFs.
AA55AA55 | Fills the entire host DMA buffer with data 0xAA55AA55.
55AA55AA | Fills the entire host DMA buffer with data 0x55AA55AA.

Default: Enabled

#### B6. External SRAM Test

Command: memtest -e

Function: This test tests the external SRAM by performing the Scratch Pad Test described in test B1.

Default: Disabled

#### C1. EEPROM Test

Command: setest

Function: Incremental test data is used in the electrically erasable programmable read-only memory (EEPROM) test. The test fills the test range with test data and reads the data back to verify the content. Afterwards, the test fills the test range with 0s to clear the memory.

Default: Enabled

#### C2. CPU Test

Command: cputest

Function: This test opens the Cpu.bin file. If the file exists and content is good, the test loads code to the Rx CPU and Tx CPU and verifies the CPU execution.

Default: Enabled

#### C3. DMA Test

Command: dmatest

Function: This test tests both high-priority direct memory access (DMA) and low-priority DMA. The test moves data from the host memory to the controller SRAM and verifies the data. The test then moves data back to the host memory to again verify the data.

Default: Enabled

#### C4. MII Test

Command: miitest

Function: The medium independent interface (MII) test function is identical to that of the A2. Control Register Test. Each register specified in the configuration contents defines the read-only and read/write bits. The test writes 0s and 1s to the test bits to ensure that the read-only bit values are not changed and that the read/write bits are changed.

Default: Test Enabled.

Default: Register table

The test attempts to read the register configuration file (Miireg.txt) for the register definitions. If the file does not exist, the following table is used:

Offset | Read-Only Mask | Read/Write Mask
--- | --- | ---
    0x00
    0x0000
    0x7180
    0x02
    0xFFFF
    0x0000
    0x03
    0xFFFF
    0x0000
    0x04
    0x0000
    0xFFFF
    0x05
    0xEFFF
    0x0000
    0x06
    0x0001
    0x0000
    0x07
    0x0800
    0xB7FF
    0x08
    0xFFFF
    0x0000
    0x09
    0x0000
    0xFF00
    0x0A
    0x7C00
    0x0000
    0x10
    0x0000
    0xFFBF
    0x11
    0x7C00
    0x0000
    0x19
    0x7C00
    0x0000
    0x1E
    0x0000
    0xFFFF
    0x1F
    0x0000
    0xFFFF

#### C5. VPD Test

Command: vpdtest

Function: The VPD test first saves the contents of the vital product data (VPD) memory before performing the test. The test then writes 1 of the 5 test data patterns (0xFF, 0xAA, 0x55, increment data, or decrement data) into VPD memory. By default, an incremental data pattern is used. The test writes and reads back the data for the entire test range, and then restores the original contents of the VPD memory.

Default: Disabled

#### C6. Alert Standard Format (ASF) Test

Command: asftest

Function:

> Reset test. This test sets the reset bit and polls for self-clearing bits. This test verifies the reset value of the registers.

> Event Mapping Test. This test sets the SMB_ATTN bit. By changing ASF_ATTN_LOC bits, the test verifies the mapping bits in TX_CPU or RX_CPU event bits.

> Counter Test

- Clears WG_TO, HB_TO, PA_TO, PL_TO, RT_TO bits (by setting the bits) and ensures that the bits clear.
- Clears the timestamp counter. Writes a 1 to each of the PL, PA, HB, WG, RT counters. Sets the TSC_EN bit.
- Polls each PA_TO bit and counts up to 50. Checks if the PL_TO bit is set at the end of the count to 50. Continues to count up to 200. Checks if all other TO bits are set and verifies if the timestamp counter is incremented.

#### C7. ROM Expansion Test

Command: romtest

Function: This function tests the ability to enable, disable, and access the expansion read-only memory (ROM) on the device.

#### D1. MAC Loopback Test

Command: pkttest -m

Function: This test is an internal loopback data transmit/receive test. It initializes the medium access control (MAC) into an internal loopback mode and transmits 100 packets. The data should be routed back to the receive channel and received by the receive routine, which verifies the integrity of data. A 100-Mbit/s data rate is used for this test unless Gigabit Ethernet is enabled.

Default: Enabled

#### D2. PHY Loopback Test

Command: pkttest -p

Function: This test is same as the MAC loopback test (D1), except that the data is routed back via a physical layer device (PHY). A 100-Mbit/s data rate is used for this test unless Gigabit Ethernet is enabled.

Default: Enabled

#### D3. RJ-45 Loopback Test

Command: pkttest -e

Function: This test is an external loopback test. From the unit under test (UUT) point of view, no loopback mode is configured. The data is expected to be routed back by the RJ-45 loopback connector. A 100-Mbit/s data rate is used for this test unless Gigabit Ethernet is enabled.

Default: Disabled

#### D4. MII Miscellaneous Test

Command: None

Function: This function tests the autopolling and PHY interrupt capabilities. These are functions of the PHY.

Default: Enabled

#### D5. MSI Test

Command: msitest

Function: This function tests the message signal interrupt (MSI) capability of the device. Refer to PCI Specification, version 2.2 for the MSI definition.

Default: Disabled

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## Error Messages

    /* 0 */ 	"PASS",

    /* 1 */ 	"Got 0x%08X @ 0x%08X. Expected 0x%08X",

    /* 2 */ 	"Cannot perform task while chip is running",

    /* 3 */ 	"Invalid NIC device",

    /* 4 */ 	"Read-only bit %s got changed after writing zero at offset 0x%X",

    /* 5 */ 	"Read-only bit %s got changed after writing one at offset 0x%X",

    /* 6 */ 	"Read/Write bit %s did not get cleared after writing zero at offset 0x%X",

    /* 7 */ 	"Read/Write bit %s did not get set after writing one at offset 0x%X",

    /* 8 */ 	"BIST failed",

    /* 9 */ 	"Could not generate interrupt",

    /* 10 */ 	"Aborted by user",

    /* 11 */ 	"TX DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X",

    /* 12 */ 	"Rx DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X",

    /* 13 */ 	"TX DMA failed",

    /* 14 */ 	"Rx DMA failed",

    /* 15 */ 	"Data error, got 0x%08X at 0x%08X, expected 0x%08X",

    /* 16 */ 	"Second read error, got 0x%08X at 0x%08X, expected 0x%08X",

    /* 17 */ 	"Failed writing EEPROM at 0x%04X",

    /* 18 */ 	"Failed reading EEPROM at 0x%04X",

    /* 19 */ 	"EEPROM data error, got 0x08X at 0x04X, expected 0x%08X",

    /* 20 */ 	"Cannot open file %s",

    /* 21 */ 	"Invalid CPU image file %s",

    /* 22 */ 	"Invalid CPU image size %d",

    /* 23 */ 	"Cannot allocate memory",

    /* 24 */ 	"Cannot reset CPU",

    /* 25 */ 	"Cannot release CPU",

    /* 26 */ 	"CPU test failed",

    /* 27 */ 	"Invalid Test Address Range\nValid NIC address is 0x%08X-0x%08X and exclude 0x%08X-0x%08X",

    /* 28 */    "DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X",

    /* 29 */    "Unsupported PhyId %04X:%04X",

    /* 30 */    "Too many registers specified in the file, max is %d",

    /* 31 */ 	"Cannot write to VPD memory",

    /* 32 */ 	"VPD data error, got %08X @ 0x04X, expected %08X",

    /* 33 */ 	"No good link! Check Loopback plug",

    /* 34 */ 	"Cannot TX Packet!",

    /* 35 */ 	"Requested to TX %d. Only %d is transmitted",

    /* 36 */	"Expected %d packets. Only %d good packet(s) have been received\n%d unknown packets have been received.\n%d bad packets have been received.",

    /* 37 */ 	"%c%d is an invalid Test",

    /* 38 */ 	"EEPROM checksum error",

    /* 39 */ 	"Error in reading WOL/PXE",

    /* 40 */ 	"Error in writing WOL/PXE",

    /* 41 */ 	"No external memory detected",

    /* 42 */ 	"DMA buffer %04X is large, size must be less than %04X",

    /* 43 */ 	"File size %d is too big, max is %d",

    /* 44 */ 	"Invalid %s",

    /* 45 */ 	"Failed writing 0x%x to 0x%x",

    /* 46 */ 	"",

    /* 47 */ 	"Ambiguous command",

    /* 48 */ 	"Unknown command",

    /* 49 */ 	"Invalid option",

    /* 50 */ 	"Cannot perform task while chip is not running. (need driver)",

    /* 51 */ 	"Cannot open register define file or content is bad",

    /* 52 */ 	"ASF Reset bit did not self-clear",

    /* 53 */ 	"ATTN_LOC %d cannot be mapped to %cX CPU event bit %d",

    /* 54 */ 	"%s Register is not cleared to zero after reset",

    /* 55 */ 	"Cannot start poll_ASF Timer",

    /* 56 */ 	"poll_ASF bit did not get reset after acknowledged",

    /* 57 */ 	"Timestamp Counter is not counting",

    /* 58 */ 	"%s Timer is not working",

    /* 59 */ 	"Cannot clear bit %s in %cx CPU event register",

    /* 60 */ 	"Invalid "EEPROM_FILENAME" file size, expected %d but only can read %d bytes",

    /* 61 */ 	"Invalid magic value in %s, expected %08x but found %08x",

    /* 62 */ 	"Invalid manufacture revision, expected %c but found %c",

    /* 63 */ 	"Invalid Boot Code revision, expected %d.%d but found %d.%d",

    /* 64 */ 	"Cannot write to EEPROM",

    /* 65 */ 	"Cannot read from EEPROM",

    /* 66 */ 	"Invalid Checksum",

    /* 67 */ 	"Invalid Magic Value",

    /* 68 */ 	"Invalid MAC address, expected %02X-%02X-%02X-%02X-%02X-%02X",

    /* 69 */ 	"Slot error, expected an UUT to be found at location %02X:%02X:00",

    /* 70 */ 	"Adjacent memory has been corrupted while testing block 0x%08x-0x%08x\nGot 0x%08x @ address 0x%08x. Expected 0x%08x",

    /* 71 */ 	"The function is not Supported in this chip",

    /* 72 */ 	"Packets received with CRC error",

    /* 73 */ 	"MII error bits set: %04x",

    /* 74 */ 	"CPU does not initialize MAC address register correctly",

    /* 75 */ 	"Invalid firmware file format",

    /* 76 */ 	"Resetting TX CPU Failed",

    /* 77 */ 	"Resetting RX CPU Failed",

    /* 78 */ 	"Invalid MAC address",

    /* 79 */ 	"Mac address registers are not initialized correctly",

    /* 80 */ 	"EEPROM Bootstrap checksum error",

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